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MDT10P622
1.General Description
This OTP-Based 8-bit micro-controller uses a fully static CMOS technology process to achieve higher speed and smaller chip size with the 3K low power of consumption and high noise immunity. On memory includes words EPROM, and 128bytes of static RAM. while PED is Disable Power Edge-detector Reset (PED) Interrupt capability Timer0:8-bit timer with 8-bit prescaler (RTCC) Timer1:16bit timer with 16bit compare register. This timer can be used as carrier generator. 4 Channel comparator Sleep mode for power saving. PB with port change wake- up interrupt
2.Features
RISC CPU Fully static design 37 single word instructions 3K 14 program memory 128 bytes RAM for data 23 bi-directional I/O Eight level hardware stacks Watchdog timer (WDT) with on-chip RC oscillator Power-On Reset (POR) ,only available
3.Applications
The application areas of this NEW MCU range from appliance motor control and high speed automotive to low power remote transmitters/receivers and telecommunications processors, such as Remote controller, small instruments, toy , automobile and keyboard...etc.
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P.1
2006/7
Ver1.0
MDT10P622
4. Pin Diagram
DIP/SOP
PA4/RTCC VDD PA5 VSS PA6/INT PA0 PA1 PA2 PA3 PB0 PB1 PB2 PB3 PB4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 /MCLR 27 OSC1 26 OSC2 25 PC7 24 PC6/ VREF 23 PC5/CIC3 22 PC4/CIC2 21 PC3/CIC1 20 PC2/CIC0 19 PC1/T1OSI 18 PC0/T1OSO/T1SKI 17 PB7 16 PB6 15 PB5 VSS PA4/RTCC VDD PA6/INT PA0 PA1 PA2 PA3 PB0 PB1 PB2 PB3 PB4 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14
SSOP
28 27 26 25 24 23 22 21 20 19 18 17 16 15 /MCLR OSC1 OSC2 PC7 PC6/ VREF PC5/CIC3 PC4/CIC2 PC3/CIC1 PC2/CIC0 PC1/T1OSI PC0/T1OSO/T1SKI PB7 PB6 PB5
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P.2
2006/7
Ver1.0
MDT10P622
5. Pin function description
Pin name Type Buffer type OSC1 OSC2 /MCLR PA0 PA1 PA2 PA3 PA4 PA5 PA6(/INT) I O I I/O I/O I/O I/O I/O I/O I/O ST TTL TTL TTL TTL ST TTL ST/TTL Can be change pin function to be external interrupt pin /int Bi-directional I/O port B. Port B can be software programmed for internal 100K ohm pull-up on all pins. PB0-PB7 can generate interrupt on pin state change. PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 Vdd Vss I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O ST/TTL ST/TTL TTL TTL TTL TTL TTL TTL Bi-directional I/O port C.. ST ST TTL TTL TTL TTL TTL TTL Power input Ground pin Can be Timer1 oscillator output or Timer1 clock input. Can be Timer1 oscillator input. TTL input level or Comparator input TTL input level or Comparator input TTL input level or Comparator input TTL input level or Comparator input TTL input level or Comparator VREF input PB0 serial programming clock PB1 serial programming data PA4 Can be clock input to RTCC input . Oscillator input Oscillator out Reset input Bi-directional I/O port A. PA6 internal pull-high 80K ohm Description
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P.3
2006/7
Ver1.0
MDT10P622
6. Memory Mapping
6.1Program memory : BANK 0 0000h 0001h 0002h 0003h 0004h Peripheral interrupt Vector 0005h Program memory (Page 0) 07FFh 0800h Program memory (Page 1) 0BFFh Reset Vector 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Dh 0Eh 0Fh 10h 11h 12h 13h 14h 15h 16h 17h 18h CCPR1L CCPR1H CCPR1C TMR1L TMR1H T1CON PSTA PCHLAT INTS PIFB1 PCHLAT INTS PIEB1 IAR RTCC PCL STATUS MSR PORT A PORT B PORT C BANK 1 IAR TMR PCL STATUS MSR CPIO A CPIO B CPIO C 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h 8Ah 8Bh 8Ch 8Dh 8Eh 8Fh OPTION2 90h 91h 92h 93h 94h 95h 96h 97h 98h 6.2Register file map :
1Fh 20h General Purpose Register 7Fh
Unimplemented memory location.
9Fh A0h General Purpose Register
BFH
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P.4
2006/7
Ver1.0
MDT10P622
BANK0
00 01 02 03 IAR (Indirect addressing register) RTCC (Timer0) register Program counter low byte Status register Bit 0 1 2 3 4 5 Symbol C DC Z PF TF Bank Function Carry Digit carry Zero flag Power-down flag WDT time-out flag Register bank select (For direct addressing) =0 Bank 0 (00h-7Fh) =1 Bank 1 (80h-BFh) General purpose bit
6:7 04 05 06 07 08 09 0A 0B
MSR (Memory select register) PORTA (Port A data register) PORTB (Port B data register) PORTC (Port C data register) Unimplemented. Unimplemented. PCHLAT (Program memory segment register) INTS (Interrupt control register) Bit 0 1 2 3 4 5 6 7 Function PB port change interrupt flag bit. /INT external interrupt flag bit. RTCC(Timer0) overflow interrupt flag bit. PB port change interrupt enable bit. /INT external interrupt enable bit. Timer0 overflow interrupt enable bit. Peripheral interrupt enable bit. Global interrupt enable bit. Function Timer1 overflow interrupt flag bit Unimplemented. Always read as 0.
0C
PIFB1 (Peripheral interrupt flag register 1.) Bit 0 7-1
0D 0E
Unimplemented. TMR1L (Timer1 data register low byte.)
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P.5
2006/7
Ver1.0
MDT10P622
0F 10 TMR1H (Timer1 data register high byte.) T1CON (Timer1 control register) Bit 0 1 2 3 4-7 11-14 15 16 17 Timer1 enable bit (0:disable 1:enable) Timer1 clock source select (0:internal clock 1:external input) Timer1 external clock synchronization control bit (0:synchronization 1: asynchronous) Timer1 oscillator enable control bit (0:disable 1:enable) Unimplemented. Always read as 0. Function
18-1F 20-7F
Unimplemented. CCPR1L (Timer1 compare low register.)(8BIT) CCPR1H (Timer1 compar high register.)(8BIT) CCPR1C (Timer1 compare control register) Bit 7-1 -Unimplemented. Always set as 0. Bit 0 - compare enable bit (0:disable 1:enable) Unimplemented. General purpose register
BANK1
80 81 Same as register 00. TMR (Time mode register) Bit Symbol Prescaler 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Function Value RTCC rate 1:2 1:4 1:8 1 : 16 1 : 32 1 : 64 1 : 128 1 : 256 0:RTCC 1:WDT WDT rate 1:1 1:2 1:4 1:8 1 : 16 1 : 32 1 : 64 1 : 128
2-0
PS 2-0
3 4 5
PSC TCE TCS
Prescaler assign bit
RTCC edge select bit 0:Increment on low to high RTCC clock source select bit 0:Internal clock 1:RTCC Pin 2006/7 Ver1.0
1:Increment on high to low
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P.6
MDT10P622
Bit 6 7 82-84 85 86 87 88 89 8A-8B 8C Symbol Port B pull-up enable bit. Function /INT interrupt edge select bit (0:enable 1:disable)
8D 8E
Same as 02H-04H. Port A data direction register.(CPIO A) Port B data direction register.(CPIO B) Port C data direction register.(CPIO C) Unimplemented. Unimplemented. Same as 0AH-0BH. Peripheral interrupt control register 1. Bit 0 - Timer1 overflow interrupt enable bit. 7-1 - Unimplemented. Always set these bits to 0. Unimplemented. PSTA (Power control register and Comparator control register.) BIT 0 1 2 3 4 5 7:6 Function The comparator function enable bit Power-on reset status bit 0:Define PC2 as TTL input (CMR0) 1:Define PC2 as comparator input. 0:Define PC3 as TTL input (CMR1) 1:Define PC3 as comparator input. 0:Define PC4 as TTL input (CMR2) 1:Define PC4 as comparator input. 0:Define PC5 as TTL input (CMR3) 1:Define PC5 as comparator input. Reference Voltage select(CMR5~CMR4) 00: 1/4 VDD 01: 1/2 VDD 10: 3/4 VDD 11: VREF(External pin and PC6 must set to input) (0:disable 1:enable)
8F 90
Unimplemented. Option register 2. ( " 0 " Enable ; " 1 " Disable ) Bit 0-3 5-7 : Unimplemented. 4 - PA 6 pull-up enable bit. Unimplemented. General purpose register. 2006/7 Ver1.0
91-9F A0-BF P.7
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MDT10P622
7.Reset Condition for all Registers
Power-On Reset, Power range detector Reset 0000 0000 xxxx xxxx 0000 0000 0001 1xxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx ---- 0000 0000 0001 ---- ---x xxxx xxxx xxxx xxxx ---- 0000 xxxx xxxx xxxx xxxx ---- ---0 1111 1111 1111 1111 1111 1111 1111 1111 ---- ---0 0000 00#0 ---1 ---x unknown -
Register
Address
/MCLR or WDT Reset
Wake-up from SLEEP
IAR RTCC PCL STATUS MSR PORT A PORT B PORT C PCHLAT INTS PIFB1 TMR1L TMR1H T1STA CCP1L CCP1H CCP1CTL TMR CPIOA CPIOB CPIOC PIEB1 PSTA OPTION2 Note u
00h(80h) 01h 02h(82h) 03h(83h) 04h(84h) 05h 06h 07h 0Ah(8Ah) 0Bh(8Bh) 0Ch 0Eh 0FH 10h 15h 16h 17h 81h 85h 86h 87h 8Ch 8Eh 90h unchanged
0000 0000 uuuu uuuu 0000 0000 000# #uuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu ---- 0000 0000 0001 ---- ---u Uuuu uuuu Uuuu uuuu ---- 0000 uuuu uuuu Uuuu uuuu ---- ---0 1111 1111 1111 1111 1111 1111 1111 1111 ---- ---0 0000 00u0 ---1 ---unimplemented
uuuu uuuu uuuu uuuu 0000 0100 000# #uuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu ---- uuuu uuuu uuuu ---- ---u Uuuu uuuu Uuuu uuuu ---- uuuu --uu uuuu --uu uuuu ---- ---u uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu ---- ---u 0000 00u0 ---u ---read as "0"
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MDT10P622
# value depends on the condition of the following table Condition POWR ON RESET /MCLR reset (not during SLEEP) /MCLR reset during SLEEP WDT reset (not during SLEEP) WDT reset during SLEEP Interrupt Wake-up during SLEEP Status bit 4 1 u 1 0 0 1 Status bit 3 1 u 0 1 0 0 PSTA bit 1 0 u u u u u
8. Instruction Set
Instruction Code
010000 00000000 010000 00000001 010000 00000010
Mnemonic Operands
NOP CLRWT SLEEP
Function
No operation Clear Watchdog timer Sleep mode
Operation
None 0 WT 0 WT, stop OSC
Status
TF, PF TF, PF
010000 00000011 010000 00000rrr 010001 1rrrrrrr 011000 trrrrrrr 111010 iiiiiiii 010111 trrrrrrr
TMODE CPIO STWR LDR LDWI R R R, t I
Load W to TMODE register Control I/O port register Store W to register Load register Load immediate to W Swap halves register
W W W R
TMODE CPIO r R t
None None None Z None None
IW [R(0~3) R(4~7)] t
SWAPR R, t
011001 trrrrrrr 011010 trrrrrrr 011011 trrrrrrr 011100 trrrrrrr
INCR
R, t
Increment register Increment register, skip if zero Add W and register Subtract W from register
R+1 t R+1 t W+R R W t t
Z None C, HC, Z C, HC, Z
INCRSZ R, t ADDWR R, t SUBWR R, t
(R+/W+1 t) 011101 trrrrrrr 011110 trrrrrrr 010010 trrrrrrr 110100 iiiiiiii 010011 trrrrrrr DECR R, t Decrement register Decrement register, skip if zero AND W and register AND W and immediate Inclu. OR W and register R R R i R 1t 1t W W W t W t Z None Z Z Z
DECRSZ R, t ANDWR R, t ANDWI i IORWR R, t
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2006/7
Ver1.0
MDT10P622
Instruction Code
110101 iiiiiiii 010100 trrrrrrr 110110 iiiiiiii 011111 trrrrrrr 010110 trrrrrrr
Mnemonic Operands
IORWI i XORWR R, t XORWI i COMR RRR R, t R, t
Function
Inclu. OR W and immediate Exclu. OR W and register Exclu. OR W and immediate Complement register Rotate right register i
Operation
W W W t R(n-1), W t W
Status
Z Z Z Z C
R i /R R(n) C
R(7), C r(n+1), C
R(0) 010101 trrrrrrr RLR R, t Rotate left register R(n) C
R(0), C Z Z None None None None None Stack None PC, None
R(7) 010000 1xxxxxxx 010001 0rrrrrrr 0000bb brrrrrrr 0010bb brrrrrrr 0001bb brrrrrrr 0011bb brrrrrrr 100nnn nnnnnnnn CLRW CLRR BCR BSR BTSC BTSS LCALL R R, b R, b R, b R, b n Clear working register Clear register Bit clear Bit set Bit Test, skip if clear Bit Test, skip if set Long CALL subroutine 0W 0R
0 R(b) 1 R(b) Skip if R(b)=0 Skip if R(b)=1 n PC, PC+1
101nnn nnnnnnnn 110001 iiiiiiii
LJUMP RTIW i
n
Long JUMP to address Return, place immediate to W
n PC Stack iW
110111 iiiiiiii
ADDWI
Add immediate to W
PC+1
PC,
C,HC,Z
W+i W 111000 iiiiiiii 010000 00001001 SUBWI RTFI Subtract W from immediate Return from interrupt i-W W PC, C,HC,Z None
Stack 1 GIS
010000 00000100
RET
Return from subroutine
Stack
PC
None
Note : W WT TMODE CPIO
: : : :
Working register Watchdog timer TMODE mode register Control I/O port register
b t
: : 0 1
Bit position Target : Working register : General register
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2006/7
Ver1.0
MDT10P622
TF PF PC OSC Inclu. Exclu. AND : : : : : : : ( PA, PB, PC Only ) Timer overflow flag Power loss flag Program Counter Oscillator Inclusive ` ' Exclusive ` ' Logic AND ` ' R C HC Z / x i n : : : : : : : : General register address Carry flag Half carry Zero flag Complement Don't care Immediate data ( 8 bits ) Immediate address
9. Electrical Characteristics
(A)Operation Voltage & Frequency Vdd : 2.3V~6.3V Frequency: 0Hz~20MHz (B)Input Voltage Port PA , PB Vil Vih RTCC /MCLR PA , PB RTCC /MCLR *Threshold Voltage PortA PortB PortC Vth = 1.6V RTCC,/MCLR Vil=1.2V Vih=3.1V (Schmitt Trigger) (C) Output Voltage @ Vdd 5.0 V, Temperature PA, PB, PC Port Ioh Iol Ioh Iol 20.0 mA 20.0 mA 5.0 mA 5.0 mA Voh 3.8 V Vol Vol 0.6V Voh 4.7V 0.2V 25 , the typical value as followings : MIN Vss Vss 2.0V 3.4V MAX 1.0V 1.0V Vdd Vdd
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MDT10P622
(D)Leakage Current @ Vdd 5.0 V, Temperature Iil Iih 25 , the typical value as followings :
1.0 A (Max.) 1.0 A (Max.) 25 , the typical value as followings :
(E) Sleep Current @WDT Enable, Temperature Vdd 2.3 V Vdd 3.0 V Vdd 4.0 V Vdd 5.0 V Vdd 6.3 V Idd=1uA
Idd=2.0 A Idd=5.0A Idd=10.0A Idd=18.0A 25 , the typical value as followings :
@WDT Disable, Temperature Vdd 2.3 V ~ 6.3 V, Idd 0.1 A
(F) Operating Current / Voltage Temperature 25 , the typical value as followings : (i) OSC Type RC (OSC1&OSC2 internal CAP about 10P) ; WDT Enable; The IC may not oscillate properly if the resistance of rext less than 4.7K The minimum resistance of rext must be more than 4.7K @ Vdd 5.0 V Cext. (F) Rext. (Ohm) 4.7 K 10.0 K 3P 47.0 K 100.0 K 300.0 K 470.0 K 4.7 K 10.0 K 20P 47.0 K 100.0 K 300.0 K 470.0 K Frequency (Hz) 7.7M 4.0M 890K 425K 140K 96K 4.8M 2.5M 540K 265K 87K 55.6K Current (A) 780u 480u 200u 155u 135u 126u 535u 340u 150u 130u 126u 124u
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Cext. (F) Rext. (Ohm) 4.7 K 10.0 K 100P 47.0 K 100.0 K 300.0 K 470.0 K 4.7 K 10.0 K 300P 47.0 K 100.0 K 300.0 K 470.0 K Frequency (Hz) 2.0M 1.0M 220K 103K 34.6K 22.K 850 K 370 K 90 K 43 K 15K 9.0 K Current (A) 279u 186u 122u 109u 107u 88u 365u 301u 270u 265u 256u 250u
(ii) OSC Type LF;(OSC1&OSC2 Internal cap) LF WDT - disable, PED - disable IC1: 2.3V 3.0V 4.0V 5.0V 6.0v 6.4V 32K(C=50P) 4uA 8uA 20uA 43uA 88uA 111uA 455K 20uA 37uA86uA 143uA 237uA 280uA 1M 29uA 50uA 95uA 127uA 185uA 215uA Sleep <0.1uA <0.1uA <0.1uA <0.1uA <0.1uA 0.1uA
(iii) OSC Type=XT (OSC1&OSC2 Internal cap) , WDT - enable, PED - disable IC1: 2.3V 3.0V 4.0V 5.0V 6.0V 6.4V 1M 42uA 71uA 141uA 314uA 558uA 702uA 4M 110uA 177uA 302uA 460uA 581uA 760uA 10M 251uA 381uA 583uA 869uA 1.2mA 1.25mA Sleep 1uA 2uA 5uA 10uA 15uA 18uA
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2006/7
Ver1.0
MDT10P622
(iv) OSC Type IC1 HF (OSC1&OSC2 Internal cap) WDT - enable, PED - disable 4M 10M 20M Sleep 106uA 171uA 353uA 569uA 830uA 937uA 288uA 403uA 682uA 966uA 1.4mA 1.5mA --775uA 1.3mA 1.85mA 2.5mA 2.8mA 1uA 2uA 5uA 10uA 15uA 18uA
2.3V 3.0V 4.0V 5.0V 6.0V 6.4V
(G)Power Edge-detector Reset Voltage (Not in Sleep Mode) @Vdd=5.0V(PED=Enable) Vpr Vdd (Power Supply) Vpr 1.6V~1.80V
PS: If PED_Enable then Internal Power-On Reset will be off (H) The basic WDT time-out cycle time @Temperature Voltage (V) 2.3 3.0 4.0 5.0 6.3 25 , the typical value as followings : Basic WDT time-out cycle time (ms) 26.4ms 24.6ms 22ms 20ms 19.4ms
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2006/7
Ver1.0
MDT10P622
(I) Pull_High Resistance @ Input Mode : Vdd 5.0 V PB 7~0 5V=90k PA6 5V=45k
p.s. : It is only a reference value for the Pull High Resistance, and the accurate value of the Resistance depends on the various parameter of the Process. But the variation of the value will be not more than 20%.
10.
1
TIMER1 timer/counter
Timer1 is a 16bit timer/counter consisting two 8-bit register (TMR1H and TMR1L) increment from 0000h to FFFFh.Timer1 can operate two mode (time mode and counter mode).Used the TICON register to control Timer1 mode Timer1 ccp mode: timer1 can internal "reset " by CCP mode,CCP register consisting two 8bit register ccp1L and ccp1H and control the register(17H-bit0) enable the comparator to reset timer1
2
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Ver1.0
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11. Port A ,Port B and Port C Equivalent Circuit
PA0~3 ,PA5 ,PB0~PB7 ,PC7
Working Register
D QB
Data I/P
I/O Control
CK
I/O Control Latch
Q
PORTB USED PULL-HIGH enable bit 80K ohm
Port I/O Pin
D
Write
CK
Data O/P Latch
Q
Data Bus
QB D
Read
Data I/P Latch
CK
Input Resistor TTL Input Level
PA4/RTCC
Working Register
D QB
Data I/P
I/O Control
CK
I/O Control Latch
Q
Port I/O Pin
D
Write
CK
Data O/P Latch
Q
Data Bus
QB D
Read
Data I/P Latch
CK
Input Resistor TTL Input Level
Time0 input
Schmitt Input Level
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2006/7
Ver1.0
MDT10P622
PA6/INT
Working Register
D QB
Data I/P
I/O Control
CK
I/O Control Latch
Q
PA6 PULL-HIGH enable bit 80K ohm
Port I/O Pin
D
Write
CK
Data O/P Latch
Q
Data Bus
QB D
TTL Input Level Input Resistor
Read
Data I/P Latch
CK
Schmitt trigger buffer
PC6/VREF
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Ver1.0
MDT10P622
PC2~PC5
12. MCLRB Input Equivalent Circuit
R
1K
MCLRB Schmitt Trigger
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Ver1.0
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13. Block Diagram
Stack 8 Levels ROM 3K X 14 RAM 128 bytes Port A
12 bits 14 bits
Port PA0~PA6 7 bits
12 bits
Program Counters
Instruction Register
Special Register
OSC1 OSC2 MCLR D0~D7
Port B
Port PB0~PB7 8 bits
Oscillator Circuit
Instruction Decoder
Control Circuit
Port PC0~PC7 8 bits Data 8-bit
Power on Reset Power Down Reset Working Register ALU Status Register
Port C
CMR0~CMR5
WDT/OST Timer 8-bit Timer/Counter Prescale
Comparator mode Register
16bit timer1
PC0 ~PC1
PA4 / RTCC
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